1. Field of the Invention
The present invention relates to integrate circuits, and particularly to reference voltages within integrated circuits. Still more particularly, the present invention relates to adjustment of reference voltages within integrated circuits.
2. Description of the Prior Art
Many integrated circuits are implemented by way of circuits that are controlled by a reference voltage. Therefore, proper circuit operation in modern digital integrated circuits, particularly those fabricated utilizing complementary metal-oxide-semiconductor (CMOS) technology, often depends upon the availability of an accurate, stable reference voltage. For example, many functional circuits internal to an integrated circuit rely upon current sources that conduct a stable current. Examples of such functional circuits include differential amplifiers, current mirrors, operational amplifiers, level shift circuits, and circuits that themselves generate reference voltages. Since current sources are generally implemented as a field effect transistor receiving a reference voltage at its gate, the stability of the current source, and proper operation of the circuit containing the current source, depends upon the accuracy and stability of the reference voltage applied to the gate of the field effect transistor. Other circuits, particularly those that control the switching response of logic circuits within modern integrated circuits, may use a series field effect transistor with its gate controlled by a reference voltage to control the switching speed, or slew rate, of the circuit. The reference voltages used in these circuits is produced by a voltage reference circuit, or bias circuit, that is preferably designed to provide a stable and accurate reference voltage.
Adjustment to a voltage reference value is sometimes required to compensate for processing variations. For example, tight operational tolerances may require trim capability within the circuit to achieve the narrow window of proper operation over variations in silicon processing. Such trim capability generally includes fuses, typically blown with lasers for adjustment of the reference voltage. However, trim capability is difficult to add to some circuits generating reference voltages, particularly where fuse adjustment can cause variations over voltage due to cancellation of terms in the reference voltage output equation which will no longer cancel after fuses are blown.
It would be desirable, therefore, to provide trim up and trim down capability for any reference voltage being utilized, enabling operation within a tightly spaced window.
A reference voltage trim circuit includes a voltage follower receiving the reference voltage to be trimmed, with one or more resistive loads providing predefined voltage shifts serially connected between the output of the voltage follower and the output of the trim circuit. The voltage follower includes a current mirror differential amplifier receiving the reference voltage at one input and the output of the voltage follower at the other input, and a transistor with a resistive load connected between the power supply voltages and receiving the output of the current mirror differential amplifier at the transistor""s gate. The resistive loads provide varying preselected voltage drop and are each shunted by corresponding fuses, with the entire series of resistive loads shunted by a master fuse. To trim the reference voltage, at least the master fuse is blown, together with the fuse(s) shunting resistive loads which combine to result in the desired trim voltage. Pass gates control which end of the resistive load series is connected to the output of the voltage follower and which is connected to the output of the trim circuit. To decrement the reference voltage, a first end is connected to the output of the voltage follower and the second end is connected to trim circuit output; to increment the reference voltage, the second end of the resistive load series is connected to the voltage follower output and the first end is connected to the trim circuit output.